diff options
| author |   Marek Szyprowski <m.szyprowski@samsung.com> | 2020-03-04 15:37:26 +0100 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzk@kernel.org> | 2020-03-11 11:03:03 +0100 |
| commit | 32a1671ff8e84f0dfff3a50d4b2091d25e91f5e2 (patch) | |
| tree | 35b19bb07b53041b8fea1cd2b5b2fd88a5db03e1 | |
| parent | ARM: dts: exynos: Fix G3D power domain supply on Arndale Octa boards (diff) | |
ARM: dts: exynos: Fix polarity of the LCD SPI bus on UniversalC210 board
Recent changes in the SPI core and the SPI-GPIO driver revealed that the
GPIO lines for the LD9040 LCD controller on the UniversalC210 board are
defined incorrectly. Fix the polarity for those lines to match the old
behavior and hardware requirements to fix LCD panel operation with
recent kernels.
Cc: <stable@vger.kernel.org> # 5.0.x
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/exynos4210-universal_c210.dts | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts index a1bdf7830a87..9dda6bdb9253 100644 --- a/arch/arm/boot/dts/exynos4210-universal_c210.dts +++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts @@ -115,7 +115,7 @@ gpio-sck = <&gpy3 1 GPIO_ACTIVE_HIGH>; gpio-mosi = <&gpy3 3 GPIO_ACTIVE_HIGH>; num-chipselects = <1>; - cs-gpios = <&gpy4 3 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpy4 3 GPIO_ACTIVE_LOW>; lcd@0 { compatible = "samsung,ld9040"; @@ -124,8 +124,6 @@ vci-supply = <&ldo17_reg>; reset-gpios = <&gpy4 5 GPIO_ACTIVE_HIGH>; spi-max-frequency = <1200000>; - spi-cpol; - spi-cpha; power-on-delay = <10>; reset-delay = <10>; panel-width-mm = <90>; |