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| author |   Anson Huang <anson.huang@nxp.com> | 2019-01-11 06:22:40 +0000 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2019-01-16 10:00:12 +0800 |
| commit | 35d6808221bd22005839ded36ddae381fe08e381 (patch) | |
| tree | 2a2542d0c65c12b50a0528c7c498146f71c41de4 | |
| parent | dt-bindings: arm: imx: add imx8qxp mek support (diff) | |
| download | linux-dev-35d6808221bd22005839ded36ddae381fe08e381.tar.xz linux-dev-35d6808221bd22005839ded36ddae381fe08e381.zip | |
dt-bindings: fsl: add imx7ulp system integration module binding
Add i.MX7ULP system integration module (SIM) binding.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt new file mode 100644 index 000000000000..7d0c7f002401 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt @@ -0,0 +1,16 @@ +Freescale i.MX7ULP System Integration Module +---------------------------------------------- +The system integration module (SIM) provides system control and chip configuration +registers. In this module, chip revision information is located in JTAG ID register, +and a set of registers have been made available in DGO domain for SW use, with the +objective to maintain its value between system resets. + +Required properties: +- compatible: Should be "fsl,imx7ulp-sim". +- reg: Specifies base physical address and size of the register sets. + +Example: +sim: sim@410a3000 { + compatible = "fsl,imx7ulp-sim", "syscon"; + reg = <0x410a3000 0x1000>; +}; |