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| author |   Fenghua Yu <fenghua.yu@intel.com> | 2020-07-24 16:45:20 -0700 |
|---|---|---|
| committer |   Ingo Molnar <mingo@kernel.org> | 2020-07-25 12:17:00 +0200 |
| commit | 3aae57f0c3ba57715cf89201b5a5f290684078a5 (patch) | |
| tree | 2668e7b8906909f8f2697aa71ac214f42c788df5 | |
| parent | x86/cpu: Add Lakefield, Alder Lake and Rocket Lake models to the to Intel CPU family (diff) | |
| download | linux-dev-3aae57f0c3ba57715cf89201b5a5f290684078a5.tar.xz linux-dev-3aae57f0c3ba57715cf89201b5a5f290684078a5.zip | |
x86/split_lock: Enable the split lock feature on Sapphire Rapids and Alder Lake CPUs
Add Sapphire Rapids and Alder Lake processors to CPU list to enumerate
and enable the split lock feature.
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Link: https://lore.kernel.org/r/1595634320-79689-1-git-send-email-fenghua.yu@intel.com
| -rw-r--r-- | arch/x86/kernel/cpu/intel.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 0ab48f1cdf84..b6b7b38dff5f 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c @@ -1156,6 +1156,8 @@ static const struct x86_cpu_id split_lock_cpu_ids[] __initconst = { X86_MATCH_INTEL_FAM6_MODEL(ATOM_TREMONT_L, 1), X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE_L, 1), X86_MATCH_INTEL_FAM6_MODEL(TIGERLAKE, 1), + X86_MATCH_INTEL_FAM6_MODEL(SAPPHIRERAPIDS_X, 1), + X86_MATCH_INTEL_FAM6_MODEL(ALDERLAKE, 1), {} }; |