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| author |   Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2017-04-20 21:51:34 +0300 |
|---|---|---|
| committer |   Simon Horman <horms+renesas@verge.net.au> | 2017-07-27 16:28:32 +0200 |
| commit | 403812e4c4d853548237417fca2cf400351b72e6 (patch) | |
| tree | 7f692b8b6f6f8476983da6d6fd4dc761367d3e61 | |
| parent | ARM: dts: r8a7743: add PFC support (diff) | |
| download | linux-dev-403812e4c4d853548237417fca2cf400351b72e6.tar.xz linux-dev-403812e4c4d853548237417fca2cf400351b72e6.zip | |
ARM: dts: sk-rzg1m: add SCIF0 pins
Add the (previously omitted) SCIF0 pin data to the SK-RZG1M board's
device tree.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm/boot/dts/r8a7743-sk-rzg1m.dts | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts index 3a22538208f2..97a066c22003 100644 --- a/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts +++ b/arch/arm/boot/dts/r8a7743-sk-rzg1m.dts @@ -1,7 +1,7 @@ /* * Device Tree Source for the SK-RZG1M board * - * Copyright (C) 2016 Cogent Embedded, Inc. + * Copyright (C) 2016-2017 Cogent Embedded, Inc. * * This file is licensed under the terms of the GNU General Public License * version 2. This program is licensed "as is" without any warranty of any @@ -39,7 +39,17 @@ clock-frequency = <20000000>; }; +&pfc { + scif0_pins: scif0 { + groups = "scif0_data_d"; + function = "scif0"; + }; +}; + &scif0 { + pinctrl-0 = <&scif0_pins>; + pinctrl-names = "default"; + status = "okay"; }; |