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| author |   Simon Horman <horms+renesas@verge.net.au> | 2019-05-23 16:25:38 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2019-06-06 10:59:52 +0200 |
| commit | 47e1714ab93da6936bc662fe4a19a2c183d5b1a1 (patch) | |
| tree | 2c9e4eec70860683676876e754f352117cdc5d07 | |
| parent | arm64: dts: renesas: r8a7795: Create thermal zone to support IPA (diff) | |
| download | linux-dev-47e1714ab93da6936bc662fe4a19a2c183d5b1a1.tar.xz linux-dev-47e1714ab93da6936bc662fe4a19a2c183d5b1a1.zip | |
arm64: dts: renesas: r8a7795: Add dynamic power coefficient
Describe the dynamic power coefficient of A57 and A53 CPUs.
Based on work by Gaku Inami <gaku.inami.xw@bp.renesas.com> and others.
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index f340b663cb80..1745ac4b307e 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -155,6 +155,7 @@ power-domains = <&sysc R8A7795_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + dynamic-power-coefficient = <854>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z>; operating-points-v2 = <&cluster0_opp>; capacity-dmips-mhz = <1024>; @@ -208,6 +209,7 @@ next-level-cache = <&L2_CA53>; enable-method = "psci"; #cooling-cells = <2>; + dynamic-power-coefficient = <277>; clocks = <&cpg CPG_CORE R8A7795_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; capacity-dmips-mhz = <535>; |