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| author |   Nicholas Piggin <npiggin@gmail.com> | 2020-07-24 23:14:23 +1000 |
|---|---|---|
| committer |   Michael Ellerman <mpe@ellerman.id.au> | 2020-07-27 00:01:29 +1000 |
| commit | 49a7d46a06c30c7beabbf9d1a8ea1de0f9e4fdfe (patch) | |
| tree | d5249ad0043cb1dd0f1faa889c850e7b958c7cf2 | |
| parent | powerpc/qspinlock: Optimised atomic_try_cmpxchg_lock() that adds the lock hint (diff) | |
| download | linux-dev-49a7d46a06c30c7beabbf9d1a8ea1de0f9e4fdfe.tar.xz linux-dev-49a7d46a06c30c7beabbf9d1a8ea1de0f9e4fdfe.zip | |
powerpc: Implement smp_cond_load_relaxed()
This implements smp_cond_load_relaxed() with the slowpath busy loop
using the preferred SMT priority pattern.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Acked-by: Waiman Long <longman@redhat.com>
[mpe: Make it 64-bit only to fix build errors on 32-bit]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200724131423.1362108-7-npiggin@gmail.com
| -rw-r--r-- | arch/powerpc/include/asm/barrier.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/barrier.h b/arch/powerpc/include/asm/barrier.h index 35c1b8f3aa68..f53c42380832 100644 --- a/arch/powerpc/include/asm/barrier.h +++ b/arch/powerpc/include/asm/barrier.h @@ -80,6 +80,22 @@ do { \ ___p1; \ }) +#ifdef CONFIG_PPC64 +#define smp_cond_load_relaxed(ptr, cond_expr) ({ \ + typeof(ptr) __PTR = (ptr); \ + __unqual_scalar_typeof(*ptr) VAL; \ + VAL = READ_ONCE(*__PTR); \ + if (unlikely(!(cond_expr))) { \ + spin_begin(); \ + do { \ + VAL = READ_ONCE(*__PTR); \ + } while (!(cond_expr)); \ + spin_end(); \ + } \ + (typeof(*ptr))VAL; \ +}) +#endif + #ifdef CONFIG_PPC_BOOK3S_64 #define NOSPEC_BARRIER_SLOT nop #elif defined(CONFIG_PPC_FSL_BOOK3E) |