diff options
| author |   Rex Zhu <Rex.Zhu@amd.com> | 2017-09-12 13:18:13 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2017-09-18 23:30:37 -0400 |
| commit | 510c2558b9055f3ae8a405cb18e1cbb7262449fc (patch) | |
| tree | 1ab12b6fbc8a2ea7a900f9fb9b60b33cfadc3d04 | |
| parent | drm/amd/powerplay: fix spelling typo in function name (diff) | |
drm/amd/powerplay: fix pcie max lane define error
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h index 629990f505dd..57a0467b7267 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h +++ b/drivers/gpu/drm/amd/powerplay/inc/hardwaremanager.h @@ -297,7 +297,7 @@ typedef enum PP_PCIEGen PP_PCIEGen; #define PP_Min_PCIEGen PP_PCIEGen1 #define PP_Max_PCIEGen PP_PCIEGen3 #define PP_Min_PCIELane 1 -#define PP_Max_PCIELane 32 +#define PP_Max_PCIELane 16 enum phm_clock_Type { PHM_DispClock = 1, |