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| author |   Russell King <rmk@dyn-67.arm.linux.org.uk> | 2007-05-17 10:19:23 +0100 |
|---|---|---|
| committer |   Russell King <rmk+kernel@arm.linux.org.uk> | 2007-05-17 10:19:23 +0100 |
| commit | 516793c61b3db1f60e0b0d0e3c382bcca9ae84fd (patch) | |
| tree | 1e9a0b8e01ecac7c60c5d0f6b157181ab1132467 | |
| parent | [ARM] integrator: fix pci_v3 compile error with DEBUG_LL (diff) | |
| download | linux-dev-516793c61b3db1f60e0b0d0e3c382bcca9ae84fd.tar.xz linux-dev-516793c61b3db1f60e0b0d0e3c382bcca9ae84fd.zip | |
[ARM] ARMv6: add CPU_HAS_ASID configuration
Presently, we check for the minimum ARM architecture that we're
building for to determine whether we need ASID support. This is
wrong - if we're going to support a range of CPUs which include
ARMv6 or higher, we need the ASID.
Convert the checks to use a new configuration symbol, and arrange
for ARMv6 and higher CPU entries to select it.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/kernel/asm-offsets.c | 2 | ||||
| -rw-r--r-- | arch/arm/mm/Kconfig | 8 | ||||
| -rw-r--r-- | include/asm-arm/mmu.h | 4 | ||||
| -rw-r--r-- | include/asm-arm/mmu_context.h | 2 |
4 files changed, 12 insertions, 4 deletions
diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c index 3c078e346753..3278e713c32a 100644 --- a/arch/arm/kernel/asm-offsets.c +++ b/arch/arm/kernel/asm-offsets.c @@ -85,7 +85,7 @@ int main(void) DEFINE(S_OLD_R0, offsetof(struct pt_regs, ARM_ORIG_r0)); DEFINE(S_FRAME_SIZE, sizeof(struct pt_regs)); BLANK(); -#if __LINUX_ARM_ARCH__ >= 6 +#ifdef CONFIG_CPU_HAS_ASID DEFINE(MM_CONTEXT_ID, offsetof(struct mm_struct, context.id)); BLANK(); #endif diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index 15f0284010ca..5f472a8b406a 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -351,6 +351,7 @@ config CPU_V6 select CPU_CACHE_V6 select CPU_CACHE_VIPT select CPU_CP15_MMU + select CPU_HAS_ASID select CPU_COPY_V6 if MMU select CPU_TLB_V6 if MMU @@ -376,6 +377,7 @@ config CPU_V7 select CPU_CACHE_V7 select CPU_CACHE_VIPT select CPU_CP15_MMU + select CPU_HAS_ASID select CPU_COPY_V6 if MMU select CPU_TLB_V6 if MMU @@ -498,6 +500,12 @@ config CPU_TLB_V6 endif +config CPU_HAS_ASID + bool + help + This indicates whether the CPU has the ASID register; used to + tag TLB and possibly cache entries. + config CPU_CP15 bool help diff --git a/include/asm-arm/mmu.h b/include/asm-arm/mmu.h index fe2a23b5627b..53099d4ee421 100644 --- a/include/asm-arm/mmu.h +++ b/include/asm-arm/mmu.h @@ -4,13 +4,13 @@ #ifdef CONFIG_MMU typedef struct { -#if __LINUX_ARM_ARCH__ >= 6 +#ifdef CONFIG_CPU_HAS_ASID unsigned int id; #endif unsigned int kvm_seq; } mm_context_t; -#if __LINUX_ARM_ARCH__ >= 6 +#ifdef CONFIG_CPU_HAS_ASID #define ASID(mm) ((mm)->context.id & 255) #else #define ASID(mm) (0) diff --git a/include/asm-arm/mmu_context.h b/include/asm-arm/mmu_context.h index 4981ad419198..6913d02ca5d6 100644 --- a/include/asm-arm/mmu_context.h +++ b/include/asm-arm/mmu_context.h @@ -20,7 +20,7 @@ void __check_kvm_seq(struct mm_struct *mm); -#if __LINUX_ARM_ARCH__ >= 6 +#ifdef CONFIG_CPU_HAS_ASID /* * On ARMv6, we have the following structure in the Context ID: |