diff options
| author |   Sam Protsenko <semen.protsenko@linaro.org> | 2021-12-17 18:15:47 +0200 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> | 2021-12-20 10:35:32 +0100 |
| commit | 51b1a5729469cef57a3c97aa014aa6e1d2b8d864 (patch) | |
| tree | 27cb70ad9386e7b5e3e37176e11921a3c07de1e2 | |
| parent | dt-bindings: arm: samsung: Document E850-96 board binding (diff) | |
| download | linux-dev-51b1a5729469cef57a3c97aa014aa6e1d2b8d864.tar.xz linux-dev-51b1a5729469cef57a3c97aa014aa6e1d2b8d864.zip | |
dt-bindings: pinctrl: samsung: Add pin drive definitions for Exynos850
All Exynos850 GPIO blocks can use EXYNOS5420_PIN_DRV* definitions,
except GPIO_HSI block. Add pin drive strength definitions for GPIO_HSI
block correspondingly.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211217161549.24836-6-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
| -rw-r--r-- | include/dt-bindings/pinctrl/samsung.h | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/include/dt-bindings/pinctrl/samsung.h b/include/dt-bindings/pinctrl/samsung.h index b1832506b923..950970634dfe 100644 --- a/include/dt-bindings/pinctrl/samsung.h +++ b/include/dt-bindings/pinctrl/samsung.h @@ -36,7 +36,10 @@ #define EXYNOS5260_PIN_DRV_LV4 2 #define EXYNOS5260_PIN_DRV_LV6 3 -/* Drive strengths for Exynos5410, Exynos542x and Exynos5800 */ +/* + * Drive strengths for Exynos5410, Exynos542x, Exynos5800 and Exynos850 (except + * GPIO_HSI block) + */ #define EXYNOS5420_PIN_DRV_LV1 0 #define EXYNOS5420_PIN_DRV_LV2 1 #define EXYNOS5420_PIN_DRV_LV3 2 @@ -56,6 +59,14 @@ #define EXYNOS5433_PIN_DRV_SLOW_SR5 0xc #define EXYNOS5433_PIN_DRV_SLOW_SR6 0xf +/* Drive strengths for Exynos850 GPIO_HSI block */ +#define EXYNOS850_HSI_PIN_DRV_LV1 0 /* 1x */ +#define EXYNOS850_HSI_PIN_DRV_LV1_5 1 /* 1.5x */ +#define EXYNOS850_HSI_PIN_DRV_LV2 2 /* 2x */ +#define EXYNOS850_HSI_PIN_DRV_LV2_5 3 /* 2.5x */ +#define EXYNOS850_HSI_PIN_DRV_LV3 4 /* 3x */ +#define EXYNOS850_HSI_PIN_DRV_LV4 5 /* 4x */ + #define EXYNOS_PIN_FUNC_INPUT 0 #define EXYNOS_PIN_FUNC_OUTPUT 1 #define EXYNOS_PIN_FUNC_2 2 |