diff options
| author | 2021-02-14 09:30:38 +0300 | |
|---|---|---|
| committer | 2021-03-15 14:13:43 +0800 | |
| commit | 51c045ec31958be881973733766d7ceb67c3e7aa (patch) | |
| tree | 0e2955437536a2345760db00a62ae154fe969aef | |
| parent | ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" option (diff) | |
ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX
Board uses 4-wire synchronous mode for audio,
so add SYN bit for PTCR AUDMUX registers.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi index d434868e870a..10abb47b46b9 100644 --- a/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi +++ b/arch/arm/boot/dts/imx6qdl-phytec-pbab01.dtsi @@ -78,7 +78,8 @@ ssi2 { fsl,audmux-port = <1>; fsl,port-config = < - (IMX_AUDMUX_V2_PTCR_TFSDIR | + (IMX_AUDMUX_V2_PTCR_SYN | + IMX_AUDMUX_V2_PTCR_TFSDIR | IMX_AUDMUX_V2_PTCR_TFSEL(4) | IMX_AUDMUX_V2_PTCR_TCLKDIR | IMX_AUDMUX_V2_PTCR_TCSEL(4)) @@ -89,7 +90,7 @@ pins5 { fsl,audmux-port = <4>; fsl,port-config = < - 0x00000000 + IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(1) >; }; |
