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| author |   Konrad Dybcio <konrad.dybcio@somainline.org> | 2021-01-18 17:24:24 +0100 |
|---|---|---|
| committer |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-01-25 12:45:13 -0600 |
| commit | 53364cfcaa7d20d9b066f546d0bee994310fc972 (patch) | |
| tree | 3e2555ed1a3e0fc2db585405d4875f402f08b43c | |
| parent | arm64: dts: qcom: msm8992-libra: Update regulator config (diff) | |
| download | linux-dev-53364cfcaa7d20d9b066f546d0bee994310fc972.tar.xz linux-dev-53364cfcaa7d20d9b066f546d0bee994310fc972.zip | |
arm64: dts: qcom: msm8992/4: Rename vreg_vph_pwr to vph_pwr
Rename the fixed regulator to follow the common naming scheme
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Link: https://lore.kernel.org/r/20210118162432.107275-4-konrad.dybcio@somainline.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8992.dtsi | 5 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/qcom/msm8994.dtsi | 4 |
2 files changed, 4 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/qcom/msm8992.dtsi b/arch/arm64/boot/dts/qcom/msm8992.dtsi index c33b40db0f49..b2046497dcaa 100644 --- a/arch/arm64/boot/dts/qcom/msm8992.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8992.dtsi @@ -755,10 +755,9 @@ <GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; }; - vreg_vph_pwr: vreg-vph-pwr { + vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; - status = "okay"; - regulator-name = "vph-pwr"; + regulator-name = "vph_pwr"; regulator-min-microvolt = <3600000>; regulator-max-microvolt = <3600000>; diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 9755780b53d7..2a6596406d9b 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -820,9 +820,9 @@ <GIC_PPI 1 0xff08>; }; - vreg_vph_pwr: vreg-vph-pwr { + vph_pwr: vph-pwr-regulator { compatible = "regulator-fixed"; - regulator-name = "vph-pwr"; + regulator-name = "vph_pwr"; regulator-min-microvolt = <3600000>; regulator-max-microvolt = <3600000>; |