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authorThierry Reding <treding@nvidia.com>2020-08-06 17:42:45 +0200
committerThierry Reding <treding@nvidia.com>2020-08-27 17:36:46 +0200
commit562da8b494c4e2f72d0789a03e6ccd9dc14d3f25 (patch)
treef6c127574aaa6d8017c77ee73c48a721d545b7ba
parentarm64: tegra: Describe display controller outputs for Tegra210 (diff)
downloadlinux-dev-562da8b494c4e2f72d0789a03e6ccd9dc14d3f25.tar.xz
linux-dev-562da8b494c4e2f72d0789a03e6ccd9dc14d3f25.zip
arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210
The PWM on Tegra210 can run at a maximum frequency of 48 MHz and cannot reach the minimum period is 5334 ns. The currently configured period of 4880 ns is not within the valid range, so set it to 8000 ns. This value was taken from the downstream DTS files and seems to work fine. Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi2
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts2
2 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
index 6a4b50aaa25d..85ee7e6b71ac 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
@@ -337,7 +337,7 @@
vdd_gpu: regulator@100 {
compatible = "pwm-regulator";
- pwms = <&pwm 1 4880>;
+ pwms = <&pwm 1 8000>;
regulator-name = "VDD_GPU";
regulator-min-microvolt = <710000>;
regulator-max-microvolt = <1320000>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
index 553a5585edac..c55716c336c1 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
@@ -821,7 +821,7 @@
vdd_gpu: regulator@6 {
compatible = "pwm-regulator";
- pwms = <&pwm 1 4880>;
+ pwms = <&pwm 1 8000>;
regulator-name = "VDD_GPU";
regulator-min-microvolt = <710000>;