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| author |   Biju Das <biju.das.jz@bp.renesas.com> | 2022-08-04 09:26:05 +0100 |
|---|---|---|
| committer |   Geert Uytterhoeven <geert+renesas@glider.be> | 2022-08-22 09:47:36 +0200 |
| commit | 57746e993442b9e143a262623e1da6c908d782e3 (patch) | |
| tree | 3e74593cfb42790baa83cdce3b8619281ef9d5af | |
| parent | clk: renesas: r8a779f0: Add TMU and parent SASYNC clocks (diff) | |
| download | linux-dev-57746e993442b9e143a262623e1da6c908d782e3.tar.xz linux-dev-57746e993442b9e143a262623e1da6c908d782e3.zip | |
clk: renesas: r9a07g044: Add conditional compilation for r9a07g044_cpg_info
Add conditional compilation for struct r9a07g044_cpg_info, so the
compiler won't allocate any memory for this variable in case
CONFIG_CLK_R9A07G044 is disabled.
Reported-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220804082605.157269-1-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | drivers/clk/renesas/r9a07g044-cpg.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c index fd7c4eecd398..02a4fc41bb6e 100644 --- a/drivers/clk/renesas/r9a07g044-cpg.c +++ b/drivers/clk/renesas/r9a07g044-cpg.c @@ -414,6 +414,7 @@ static const unsigned int r9a07g044_crit_mod_clks[] __initconst = { MOD_CLK_BASE + R9A07G044_DMAC_ACLK, }; +#ifdef CONFIG_CLK_R9A07G044 const struct rzg2l_cpg_info r9a07g044_cpg_info = { /* Core Clocks */ .core_clks = core_clks.common, @@ -436,6 +437,7 @@ const struct rzg2l_cpg_info r9a07g044_cpg_info = { .has_clk_mon_regs = true, }; +#endif #ifdef CONFIG_CLK_R9A07G054 const struct rzg2l_cpg_info r9a07g054_cpg_info = { |