diff options
| author |   Chun-Hao Lin <hau@realtek.com> | 2015-12-24 21:15:27 +0800 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2015-12-28 00:19:38 -0500 |
| commit | 584933334b7a81f09637f28cbee759a1e24428db (patch) | |
| tree | 9fb1545b49115ef5129c3ee40ace584bc6239491 | |
| parent | r8169:Fix typo in setting RTL8168H PHY parameter (diff) | |
r8169:Update the way of reading RTL8168H PHY register "rg_saw_cnt"
The vlaue of RTL8168H PHY register "rg_saw_cnt" only valid from bit0 to bit13.
When read this register, add bitwise-anding its value with 0x3fff.
Signed-off-by: Chunhao Lin <hau@realtek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | drivers/net/ethernet/realtek/r8169.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index 11cc32b1755e..58365bcf2370 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c @@ -6136,7 +6136,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp) rtl_pcie_state_l2l3_enable(tp, false); rtl_writephy(tp, 0x1f, 0x0c42); - rg_saw_cnt = rtl_readphy(tp, 0x13); + rg_saw_cnt = (rtl_readphy(tp, 0x13) & 0x3fff); rtl_writephy(tp, 0x1f, 0x0000); if (rg_saw_cnt > 0) { u16 sw_cnt_1ms_ini; |