diff options
| author |   Thierry Reding <treding@nvidia.com> | 2020-01-16 12:32:07 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2020-06-23 18:25:42 +0200 |
| commit | 59a9dd64b7bc296964474071d4591222153274a3 (patch) | |
| tree | 09a2f37c38b6d742c6222f8f05e36af1d4e8cee0 | |
| parent | arm64: tegra: Fix #address-cells/#size-cells for SRAM on Tegra186 (diff) | |
arm64: tegra: Use standard notation for interrupts
It is customary to use angle brackets around each tuple in the
interrupts property.
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi index 373f575b8678..50b56168fc97 100644 --- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi @@ -1199,8 +1199,8 @@ compatible = "nvidia,gp10b"; reg = <0x0 0x17000000 0x0 0x1000000>, <0x0 0x18000000 0x0 0x1000000>; - interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "stall", "nonstall"; clocks = <&bpmp TEGRA186_CLK_GPCCLK>, |