diff options
| author |   Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2014-06-13 14:02:29 +0200 |
|---|---|---|
| committer |   Nicolas Ferre <nicolas.ferre@atmel.com> | 2014-06-25 17:50:08 +0200 |
| commit | 5de4728450417380d2d49fcf88905218f1787510 (patch) | |
| tree | 972cb263e5263e204b7cdcc0d081ef1039ef5cb9 | |
| parent | ARM: at91/dt: sam9n12: correct PLLA ICPLL and OUT values (diff) | |
ARM: at91/dt: sam9261: correctly define mainck
mainck (CKGR_MCFR register) is actually using main_osc (CKGR_MOR register).
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| -rw-r--r-- | arch/arm/boot/dts/at91sam9261.dtsi | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi index b309c1c6e848..9de312e9bb3e 100644 --- a/arch/arm/boot/dts/at91sam9261.dtsi +++ b/arch/arm/boot/dts/at91sam9261.dtsi @@ -581,13 +581,19 @@ clocks = <&slow_rc_osc &slow_xtal>; }; - main: mainck { - compatible = "atmel,at91rm9200-clk-main"; + main_osc: main_osc { + compatible = "atmel,at91rm9200-clk-main-osc"; #clock-cells = <0>; interrupts-extended = <&pmc AT91_PMC_MOSCS>; clocks = <&main_xtal>; }; + main: mainck { + compatible = "atmel,at91rm9200-clk-main"; + #clock-cells = <0>; + clocks = <&main_osc>; + }; + plla: pllack { compatible = "atmel,at91rm9200-clk-pll"; #clock-cells = <0>; |