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authorabdoulaye berthe <abdoulaye.berthe@amd.com>2019-11-12 11:07:24 -0500
committerAlex Deucher <alexander.deucher@amd.com>2019-12-05 16:31:10 -0500
commit5fd21b394cfec3611a4ddf49ec61c8920c001899 (patch)
tree380e58d30eda7f8b353969bd3e47424f54b21430
parentdrm/amd/display: Remove flag check in mpcc update (diff)
downloadlinux-dev-5fd21b394cfec3611a4ddf49ec61c8920c001899.tar.xz
linux-dev-5fd21b394cfec3611a4ddf49ec61c8920c001899.zip
drm/amd/display: check for repeater when setting aux_rd_interval.
[Why] When training with repeater the aux read interval must be set to repeater specific aux_red_interval. This value is always 100us for CR. [How] Check for repeater when setting the aux_rd_interval in channel equalization. Use the right offset in the aux_rd_interval array Signed-off-by: abdoulaye berthe <abdoulaye.berthe@amd.com> Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com> Acked-by: George Shen <George.Shen@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 015fa0c52746..dfcd6421ee01 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -906,10 +906,10 @@ static enum link_training_result perform_channel_equalization_sequence(
/* 3. wait for receiver to lock-on*/
wait_time_microsec = lt_settings->eq_pattern_time;
- if (!link->is_lttpr_mode_transparent)
+ if (is_repeater(link, offset))
wait_time_microsec =
translate_training_aux_read_interval(
- link->dpcd_caps.lttpr_caps.aux_rd_interval[offset]);
+ link->dpcd_caps.lttpr_caps.aux_rd_interval[offset - 1]);
wait_for_training_aux_rd_interval(
link,