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| author |   Sasha Neftin <sasha.neftin@intel.com> | 2020-06-22 10:20:30 +0300 |
|---|---|---|
| committer |   Tony Nguyen <anthony.l.nguyen@intel.com> | 2020-07-27 08:49:31 -0700 |
| commit | 60f7bb824133ee3820b94957c89e2321fd5aec3f (patch) | |
| tree | 3cc5b175281f85233b50f69d6acc016cee99fd46 | |
| parent | igc: Remove unneeded variable (diff) | |
| download | linux-dev-60f7bb824133ee3820b94957c89e2321fd5aec3f.tar.xz linux-dev-60f7bb824133ee3820b94957c89e2321fd5aec3f.zip | |
igc: Add Receive Descriptor Minimum Threshold Count to clear HW counters
The statistics of this register are being tracked, however, the register
was inadvertently missed when implementing igc_clear_hw_cntrs_base().
The register is clear on read, so add it to the function so that the
register is cleared when requested so the tracked count is accurate.
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
| -rw-r--r-- | drivers/net/ethernet/intel/igc/igc_mac.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/igc/igc_mac.c b/drivers/net/ethernet/intel/igc/igc_mac.c index 2d9ca3e1bdde..3a618e69514e 100644 --- a/drivers/net/ethernet/intel/igc/igc_mac.c +++ b/drivers/net/ethernet/intel/igc/igc_mac.c @@ -308,6 +308,7 @@ void igc_clear_hw_cntrs_base(struct igc_hw *hw) rd32(IGC_TLPIC); rd32(IGC_RLPIC); rd32(IGC_HGPTC); + rd32(IGC_RXDMTC); rd32(IGC_HGORCL); rd32(IGC_HGORCH); rd32(IGC_HGOTCL); |