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authorChuanhong Guo <gch981213@gmail.com>2022-03-20 17:59:59 +0800
committerMiquel Raynal <miquel.raynal@bootlin.com>2022-04-04 10:34:52 +0200
commit620a988813403318023296b61228ee8f3fcdb8e0 (patch)
tree103432ad29d796faea63b617754d62c63ab6f08e
parentmtd: spinand: gigadevice: add support for GD5FxGQ4xExxG (diff)
downloadlinux-dev-620a988813403318023296b61228ee8f3fcdb8e0.tar.xz
linux-dev-620a988813403318023296b61228ee8f3fcdb8e0.zip
mtd: spinand: gigadevice: add support for GD5F1GQ5RExxG
This chip is the 1.8v version of GD5F1GQ5UExxG. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-4-gch981213@gmail.com
-rw-r--r--drivers/mtd/nand/spi/gigadevice.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c
index 85a61d3d8467..d519bb85f0e7 100644
--- a/drivers/mtd/nand/spi/gigadevice.c
+++ b/drivers/mtd/nand/spi/gigadevice.c
@@ -383,6 +383,16 @@ static const struct spinand_info gigadevice_spinand_table[] = {
SPINAND_HAS_QE_BIT,
SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
gd5fxgq5xexxg_ecc_get_status)),
+ SPINAND_INFO("GD5F1GQ5RExxG",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x41),
+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(4, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
+ gd5fxgq5xexxg_ecc_get_status)),
};
static const struct spinand_manufacturer_ops gigadevice_spinand_manuf_ops = {