diff options
| author |   Likun Gao <Likun.Gao@amd.com> | 2020-02-19 16:39:04 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2020-06-03 13:52:07 -0400 |
| commit | 62c1ea6bbab70b518af82ef4fbf64ae178dbd13b (patch) | |
| tree | d841d489c3e166c38307df98343d8658204d8e5e | |
| parent | drm/amd/powerplay: set FCLK DPM for sienna_cichlid (diff) | |
drm/amd/powerplay: enable Ultra Low Voltage for sienna_cichlid
Support Ultra Low Voltage for sienna_cichlid.
Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c index f1aeef79e204..75310858dc0c 100644 --- a/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c +++ b/drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c @@ -277,6 +277,9 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu, if (adev->pm.pp_feature & PP_SOCCLK_DPM_MASK) *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT); + if (adev->pm.pp_feature & PP_ULV_MASK) + *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_ULV_BIT); + return 0; } |