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| author |   Matthew Auld <matthew.auld@intel.com> | 2021-10-18 18:45:04 +0100 |
|---|---|---|
| committer | Matthew Auld <matthew.auld@intel.com> | 2021-10-20 16:50:21 +0100 |
| commit | 63430347713a5ba48617687cc8b2aa1f01514432 (patch) | |
| tree | 9a5116173468ccdad35c18a4e857f5b1c2e3c4b9 | |
| parent | drm/i915/dmabuf: add paranoid flush-on-acquire (diff) | |
| download | linux-dev-63430347713a5ba48617687cc8b2aa1f01514432.tar.xz linux-dev-63430347713a5ba48617687cc8b2aa1f01514432.zip | |
drm/i915/userptr: add paranoid flush-on-acquire
Even though userptr objects are always coherent with the GPU, with no
way for userspace to change this with the set_caching ioctl, even on
non-LLC platforms, there is still the 'Bypass LCC' mocs setting, which
might permit reading the contents of main memory directly.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018174508.2137279-5-matthew.auld@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c index 887aca9e8dd2..3173c9f9a040 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c @@ -165,8 +165,11 @@ alloc_table: goto err; } - sg_page_sizes = i915_sg_dma_sizes(st->sgl); + WARN_ON_ONCE(!(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE)); + if (i915_gem_object_can_bypass_llc(obj)) + obj->cache_dirty = true; + sg_page_sizes = i915_sg_dma_sizes(st->sgl); __i915_gem_object_set_pages(obj, st, sg_page_sizes); return 0; |