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authorLaurent Pinchart <laurentp@cse-semaphore.com>2008-08-19 14:20:23 +0200
committerKumar Gala <galak@kernel.crashing.org>2008-08-21 00:15:54 -0500
commit639d64456e20cbfc866b18dc03cf9f9babc9c7cd (patch)
tree0e593d89118b44a500a2995af84d0f4e988affc5
parentpowerpc: fix memory leaks in QE library (diff)
downloadlinux-dev-639d64456e20cbfc866b18dc03cf9f9babc9c7cd.tar.xz
linux-dev-639d64456e20cbfc866b18dc03cf9f9babc9c7cd.zip
cpm2: Fix race condition in CPM2 GPIO library.
The CPM2 GPIO library code uses the non thread-safe clrbits32/setbits32 macros. This patch protects them with a spinlock. Signed-off-by: Laurent Pinchart <laurentp@cse-semaphore.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
-rw-r--r--arch/powerpc/sysdev/cpm_common.c37
1 files changed, 26 insertions, 11 deletions
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index 53da8a079f96..00d3d17c84a3 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -254,15 +254,11 @@ static int cpm2_gpio32_get(struct gpio_chip *gc, unsigned int gpio)
return !!(in_be32(&iop->dat) & pin_mask);
}
-static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
+static void __cpm2_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
+ int value)
{
- struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs;
- unsigned long flags;
- u32 pin_mask = 1 << (31 - gpio);
-
- spin_lock_irqsave(&cpm2_gc->lock, flags);
if (value)
cpm2_gc->cpdata |= pin_mask;
@@ -270,6 +266,18 @@ static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
cpm2_gc->cpdata &= ~pin_mask;
out_be32(&iop->dat, cpm2_gc->cpdata);
+}
+
+static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
+{
+ struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
+ unsigned long flags;
+ u32 pin_mask = 1 << (31 - gpio);
+
+ spin_lock_irqsave(&cpm2_gc->lock, flags);
+
+ __cpm2_gpio32_set(mm_gc, pin_mask, value);
spin_unlock_irqrestore(&cpm2_gc->lock, flags);
}
@@ -277,14 +285,17 @@ static void cpm2_gpio32_set(struct gpio_chip *gc, unsigned int gpio, int value)
static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs;
- u32 pin_mask;
+ unsigned long flags;
+ u32 pin_mask = 1 << (31 - gpio);
- pin_mask = 1 << (31 - gpio);
+ spin_lock_irqsave(&cpm2_gc->lock, flags);
setbits32(&iop->dir, pin_mask);
+ __cpm2_gpio32_set(mm_gc, pin_mask, val);
- cpm2_gpio32_set(gc, gpio, val);
+ spin_unlock_irqrestore(&cpm2_gc->lock, flags);
return 0;
}
@@ -292,13 +303,17 @@ static int cpm2_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
static int cpm2_gpio32_dir_in(struct gpio_chip *gc, unsigned int gpio)
{
struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
+ struct cpm2_gpio32_chip *cpm2_gc = to_cpm2_gpio32_chip(mm_gc);
struct cpm2_ioports __iomem *iop = mm_gc->regs;
- u32 pin_mask;
+ unsigned long flags;
+ u32 pin_mask = 1 << (31 - gpio);
- pin_mask = 1 << (31 - gpio);
+ spin_lock_irqsave(&cpm2_gc->lock, flags);
clrbits32(&iop->dir, pin_mask);
+ spin_unlock_irqrestore(&cpm2_gc->lock, flags);
+
return 0;
}