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| author |   Will Deacon <will.deacon@arm.com> | 2018-08-22 21:23:05 +0100 |
|---|---|---|
| committer |   Catalin Marinas <catalin.marinas@arm.com> | 2018-09-11 16:49:10 +0100 |
| commit | 6899a4c82faf9b41bbddf330651a4d1155f8b64e (patch) | |
| tree | e6705ba5baaede1a06a07f0a43f463d39c33a0e7 | |
| parent | arm64: uaccess: implement unsafe accessors (diff) | |
| download | linux-dev-6899a4c82faf9b41bbddf330651a4d1155f8b64e.tar.xz linux-dev-6899a4c82faf9b41bbddf330651a4d1155f8b64e.zip | |
arm64: tlb: Use last-level invalidation in flush_tlb_kernel_range()
flush_tlb_kernel_range() is only ever used to invalidate last-level
entries, so we can restrict the scope of the TLB invalidation
instruction.
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| -rw-r--r-- | arch/arm64/include/asm/tlbflush.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index a4a1901140ee..7e2a35424ca4 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -199,7 +199,7 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end dsb(ishst); for (addr = start; addr < end; addr += 1 << (PAGE_SHIFT - 12)) - __tlbi(vaae1is, addr); + __tlbi(vaale1is, addr); dsb(ish); isb(); } |