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| author |   Linus Torvalds <torvalds@linux-foundation.org> | 2021-04-26 10:00:38 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-04-26 10:00:38 -0700 |
| commit | 6f78c2a7b7219bc2e455250365f438621e5819d0 (patch) | |
| tree | d74514981e1f8e0a8b5ae66a702fce1f833715f4 | |
| parent | Merge tag 'timers-core-2021-04-26' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip (diff) | |
| parent | x86/vector: Add a sanity check to prevent IRQ2 allocations (diff) | |
| download | linux-dev-6f78c2a7b7219bc2e455250365f438621e5819d0.tar.xz linux-dev-6f78c2a7b7219bc2e455250365f438621e5819d0.zip | |
Merge tag 'x86-apic-2021-04-26' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 apic update from Thomas Gleixner:
"A single commit to make the vector allocation code more resilent
against an accidental allocation attempt for IRQ2"
* tag 'x86-apic-2021-04-26' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/vector: Add a sanity check to prevent IRQ2 allocations
| -rw-r--r-- | arch/x86/kernel/apic/vector.c | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/x86/kernel/apic/vector.c b/arch/x86/kernel/apic/vector.c index 6aa27e08b3e2..6dbdc7c22bb7 100644 --- a/arch/x86/kernel/apic/vector.c +++ b/arch/x86/kernel/apic/vector.c @@ -543,6 +543,14 @@ static int x86_vector_alloc_irqs(struct irq_domain *domain, unsigned int virq, if ((info->flags & X86_IRQ_ALLOC_CONTIGUOUS_VECTORS) && nr_irqs > 1) return -ENOSYS; + /* + * Catch any attempt to touch the cascade interrupt on a PIC + * equipped system. + */ + if (WARN_ON_ONCE(info->flags & X86_IRQ_ALLOC_LEGACY && + virq == PIC_CASCADE_IR)) + return -EINVAL; + for (i = 0; i < nr_irqs; i++) { irqd = irq_domain_get_irq_data(domain, virq + i); BUG_ON(!irqd); @@ -745,6 +753,11 @@ void __init lapic_assign_system_vectors(void) /* Mark the preallocated legacy interrupts */ for (i = 0; i < nr_legacy_irqs(); i++) { + /* + * Don't touch the cascade interrupt. It's unusable + * on PIC equipped machines. See the large comment + * in the IO/APIC code. + */ if (i != PIC_CASCADE_IR) irq_matrix_assign(vector_matrix, ISA_IRQ_VECTOR(i)); } |