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| author |   Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2018-08-31 18:38:07 +0200 |
|---|---|---|
| committer |   Thierry Reding <treding@nvidia.com> | 2018-09-26 16:45:49 +0200 |
| commit | 70451b5e6733d823632ebf1a73ace9b17f28ce47 (patch) | |
| tree | 41cf6440c8839aa9c4225584b312b1e78ffc55a9 | |
| parent | ARM: tegra: apalis_t30: get rid of fake clocks simple bus (diff) | |
| download | linux-dev-70451b5e6733d823632ebf1a73ace9b17f28ce47.tar.xz linux-dev-70451b5e6733d823632ebf1a73ace9b17f28ce47.zip | |
ARM: tegra: apalis_t30: line break long compatible property line
Line break long compatible property line.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra30-apalis-eval.dts | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra30-apalis-eval.dts b/arch/arm/boot/dts/tegra30-apalis-eval.dts index 5d1bc8560dbe..97e2f1822a94 100644 --- a/arch/arm/boot/dts/tegra30-apalis-eval.dts +++ b/arch/arm/boot/dts/tegra30-apalis-eval.dts @@ -6,7 +6,8 @@ / { model = "Toradex Apalis T30 on Apalis Evaluation Board"; - compatible = "toradex,apalis_t30-eval", "toradex,apalis_t30", "nvidia,tegra30"; + compatible = "toradex,apalis_t30-eval", "toradex,apalis_t30", + "nvidia,tegra30"; aliases { rtc0 = "/i2c@7000c000/rtc@68"; |