diff options
| author |   Icenowy Zheng <icenowy@aosc.io> | 2019-07-28 11:12:23 +0800 |
|---|---|---|
| committer |   Maxime Ripard <maxime.ripard@bootlin.com> | 2019-08-12 10:05:13 +0200 |
| commit | 720099603d1f62e37b789366d7e89824b009ca28 (patch) | |
| tree | 0ce62e9c102efc106c55f594391a29c368f57acc | |
| parent | dt-bindings: clk: sunxi-ccu: add compatible string for V3 CCU (diff) | |
clk: sunxi-ng: v3s: add missing clock slices for MMC2 module clocks
The MMC2 clock slices are currently not defined in V3s CCU driver, which
makes MMC2 not working.
Fix this issue.
Fixes: d0f11d14b0bc ("clk: sunxi-ng: add support for V3s CCU")
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun8i-v3s.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c index 4eb68243e310..f79170e145df 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-v3s.c @@ -513,6 +513,9 @@ static struct clk_hw_onecell_data sun8i_v3s_hw_clks = { [CLK_MMC1] = &mmc1_clk.common.hw, [CLK_MMC1_SAMPLE] = &mmc1_sample_clk.common.hw, [CLK_MMC1_OUTPUT] = &mmc1_output_clk.common.hw, + [CLK_MMC2] = &mmc2_clk.common.hw, + [CLK_MMC2_SAMPLE] = &mmc2_sample_clk.common.hw, + [CLK_MMC2_OUTPUT] = &mmc2_output_clk.common.hw, [CLK_CE] = &ce_clk.common.hw, [CLK_SPI0] = &spi0_clk.common.hw, [CLK_USB_PHY0] = &usb_phy0_clk.common.hw, |