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authorTony Prisk <linux@prisktech.co.nz>2013-05-09 07:35:13 +1200
committerTony Prisk <linux@prisktech.co.nz>2013-05-12 20:31:13 +1200
commit7d4c6f3c5fdb216dfd36573d117eff602146cdcd (patch)
treea5e1ad0391d313df383a300cf89721d2470c5771
parentdts: vt8500: Update serial nodes and disable by default in SoC files (diff)
downloadlinux-dev-7d4c6f3c5fdb216dfd36573d117eff602146cdcd.tar.xz
linux-dev-7d4c6f3c5fdb216dfd36573d117eff602146cdcd.zip
dts: clk: vt8500: Update SoC dtsi to use WM8850 PLL
clocks Change the WM8850 SoC dtsi to use the new wm8850 specific PLL clock binding. Previously, the WM8850 used the wm8750 pll clock which is actually different to the wm8850 pll clock. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
-rw-r--r--arch/arm/boot/dts/wm8850.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/wm8850.dtsi b/arch/arm/boot/dts/wm8850.dtsi
index fc60e3204589..9239c0a3aeb7 100644
--- a/arch/arm/boot/dts/wm8850.dtsi
+++ b/arch/arm/boot/dts/wm8850.dtsi
@@ -83,14 +83,14 @@
plla: plla {
#clock-cells = <0>;
- compatible = "wm,wm8750-pll-clock";
+ compatible = "wm,wm8850-pll-clock";
clocks = <&ref25>;
reg = <0x200>;
};
pllb: pllb {
#clock-cells = <0>;
- compatible = "wm,wm8750-pll-clock";
+ compatible = "wm,wm8850-pll-clock";
clocks = <&ref25>;
reg = <0x204>;
};