diff options
| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2018-02-21 18:02:30 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2018-02-22 17:39:38 +0200 |
| commit | 85798ac9b35f8cc7608a4a798d0b0626f0d54d61 (patch) | |
| tree | 42d9fa886799f9cbdcd4934dcfbfa7e7a49b2528 | |
| parent | drm/i915: Fix Limited Range Color Handling (diff) | |
| download | linux-dev-85798ac9b35f8cc7608a4a798d0b0626f0d54d61.tar.xz linux-dev-85798ac9b35f8cc7608a4a798d0b0626f0d54d61.zip | |
drm/i915: Fail if we can't get a fence for gen2/3 tiled scanout
Gen2/3 display engine depends on the fence for tiled scanout. So if we
fail to get a fence fail the entire operation.
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180221160235.11134-2-ville.syrjala@linux.intel.com
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index c14d2a25408d..c96032c0406f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -2123,6 +2123,8 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, goto err; if (i915_vma_is_map_and_fenceable(vma)) { + int ret; + /* Install a fence for tiled scan-out. Pre-i965 always needs a * fence, whereas 965+ only requires a fence if using * framebuffer compression. For simplicity, we always, when @@ -2139,7 +2141,13 @@ intel_pin_and_fence_fb_obj(struct drm_framebuffer *fb, * something and try to run the system in a "less than optimal" * mode that matches the user configuration. */ - if (i915_vma_pin_fence(vma) == 0 && vma->fence) + ret = i915_vma_pin_fence(vma); + if (ret != 0 && INTEL_GEN(dev_priv) < 4) { + vma = ERR_PTR(ret); + goto err; + } + + if (ret == 0 && vma->fence) *out_flags |= PLANE_HAS_FENCE; } |