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| author |   Andrew Bresticker <abrestic@chromium.org> | 2014-09-18 14:47:18 -0700 |
|---|---|---|
| committer |   Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 07:44:54 +0100 |
| commit | 8635233ca5987bd42953aeffab1f60a3b8ffc78f (patch) | |
| tree | c9bc704870d1504e2946015541eb40a6e9708160 | |
| parent | MIPS: Malta: Move MSC01 interrupt base (diff) | |
| download | linux-dev-8635233ca5987bd42953aeffab1f60a3b8ffc78f.tar.xz linux-dev-8635233ca5987bd42953aeffab1f60a3b8ffc78f.zip | |
MIPS: Move MIPS_GIC_IRQ_BASE into platform irq.h
Define a generic MIPS_GIC_IRQ_BASE which should be suitable for all
current boards in <mach-generic/irq.h>.
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7808/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| -rw-r--r-- | arch/mips/include/asm/mach-generic/irq.h | 6 | ||||
| -rw-r--r-- | arch/mips/include/asm/mips-boards/maltaint.h | 2 | ||||
| -rw-r--r-- | arch/mips/include/asm/mips-boards/sead3int.h | 2 |
3 files changed, 6 insertions, 4 deletions
diff --git a/arch/mips/include/asm/mach-generic/irq.h b/arch/mips/include/asm/mach-generic/irq.h index 139cd200e79d..050e18bb1a04 100644 --- a/arch/mips/include/asm/mach-generic/irq.h +++ b/arch/mips/include/asm/mach-generic/irq.h @@ -36,4 +36,10 @@ #endif /* CONFIG_IRQ_CPU */ +#ifdef CONFIG_MIPS_GIC +#ifndef MIPS_GIC_IRQ_BASE +#define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8) +#endif +#endif /* CONFIG_MIPS_GIC */ + #endif /* __ASM_MACH_GENERIC_IRQ_H */ diff --git a/arch/mips/include/asm/mips-boards/maltaint.h b/arch/mips/include/asm/mips-boards/maltaint.h index 4186606bef0c..d741628e3397 100644 --- a/arch/mips/include/asm/mips-boards/maltaint.h +++ b/arch/mips/include/asm/mips-boards/maltaint.h @@ -10,8 +10,6 @@ #ifndef _MIPS_MALTAINT_H #define _MIPS_MALTAINT_H -#define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8) - /* * Interrupts 0..15 are used for Malta ISA compatible interrupts */ diff --git a/arch/mips/include/asm/mips-boards/sead3int.h b/arch/mips/include/asm/mips-boards/sead3int.h index 2320331f1464..11ebec94f807 100644 --- a/arch/mips/include/asm/mips-boards/sead3int.h +++ b/arch/mips/include/asm/mips-boards/sead3int.h @@ -14,6 +14,4 @@ #define GIC_BASE_ADDR 0x1b1c0000 #define GIC_ADDRSPACE_SZ (128 * 1024) -#define MIPS_GIC_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8) - #endif /* !(_MIPS_SEAD3INT_H) */ |