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| author |   Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2022-09-08 16:05:18 +0300 |
|---|---|---|
| committer |   Mark Brown <broonie@kernel.org> | 2022-09-08 15:25:23 +0100 |
| commit | 86432b7f8f92b784c2e4af5b02766fb44052abf7 (patch) | |
| tree | 2110e67f4affad9ac71d6f32f53328be5425a563 | |
| parent | spi: meson-spicc: do not rely on busy flag in pow2 clk ops (diff) | |
| download | linux-dev-86432b7f8f92b784c2e4af5b02766fb44052abf7.tar.xz linux-dev-86432b7f8f92b784c2e4af5b02766fb44052abf7.zip | |
spi: Group cs_change and cs_off flags together in struct spi_transfer
The commit 5e0531f6b90a ("spi: Add capability to perform some transfer
with chipselect off") added a new flag but squeezed it into a wrong
group of struct spi_transfer members (note that SPI_NBITS_* are macros
for easier interpretation of the tx_nbits and rx_nbits bitfields).
Group cs_change and cs_off flags together and their doc strings.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20220908130518.32186-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | include/linux/spi/spi.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 6e6c62c59957..19acd4c9c7e3 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -846,8 +846,8 @@ struct spi_res { * @bits_per_word: select a bits_per_word other than the device default * for this transfer. If 0 the default (from @spi_device) is used. * @dummy_data: indicates transfer is dummy bytes transfer. - * @cs_change: affects chipselect after this transfer completes * @cs_off: performs the transfer with chipselect off. + * @cs_change: affects chipselect after this transfer completes * @cs_change_delay: delay between cs deassert and assert when * @cs_change is set and @spi_transfer is not the last in @spi_message * @delay: delay to be introduced after this transfer before @@ -957,10 +957,10 @@ struct spi_transfer { struct sg_table rx_sg; unsigned dummy_data:1; + unsigned cs_off:1; unsigned cs_change:1; unsigned tx_nbits:3; unsigned rx_nbits:3; - unsigned cs_off:1; #define SPI_NBITS_SINGLE 0x01 /* 1bit transfer */ #define SPI_NBITS_DUAL 0x02 /* 2bits transfer */ #define SPI_NBITS_QUAD 0x04 /* 4bits transfer */ |