diff options
| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-03-08 01:39:39 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-03-10 11:07:32 +0200 |
| commit | 8b3ed19ccf9fc80d8d750f61c620eaf9836008ad (patch) | |
| tree | a3728ddff10cd04f834d0b759d7b5fdcfabd434b | |
| parent | drm/i915: Replace hand rolled bxt vco calculation with chv_calc_dpll_params() (diff) | |
| download | linux-dev-8b3ed19ccf9fc80d8d750f61c620eaf9836008ad.tar.xz linux-dev-8b3ed19ccf9fc80d8d750f61c620eaf9836008ad.zip | |
drm/i915: Populate bxt/glk DPLL clock limits a bit more
Set the bxt/glk DPLL min dotclock to 25MHz (HDMI minimum)
and the max to 594 MHz (HDMI max). The supported DP frequencies
(162MHz-540MHz) fit within the same range.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220307233940.4161-8-ville.syrjala@linux.intel.com
Acked-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dpll.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c index c0c76ff8b590..95b9d327ed4d 100644 --- a/drivers/gpu/drm/i915/display/intel_dpll.c +++ b/drivers/gpu/drm/i915/display/intel_dpll.c @@ -285,8 +285,7 @@ static const struct intel_limit intel_limits_chv = { }; static const struct intel_limit intel_limits_bxt = { - /* FIXME: find real dot limits */ - .dot = { .min = 0, .max = INT_MAX }, + .dot = { .min = 25000, .max = 594000 }, .vco = { .min = 4800000, .max = 6700000 }, .n = { .min = 1, .max = 1 }, .m1 = { .min = 2, .max = 2 }, |