diff options
| author |   Damien Lespiau <damien.lespiau@intel.com> | 2015-02-09 19:33:18 +0000 |
|---|---|---|
| committer |   Daniel Vetter <daniel.vetter@ffwll.ch> | 2015-02-13 23:28:35 +0100 |
| commit | 8bc0ccf6b1f0c0c6eef8301cb2a5b743a01635db (patch) | |
| tree | e3f2400e5728667c4acfeac58fca4ef5932c5a45 | |
| parent | drm/i915/skl: Implement WaDisablePartialResolveInVc (diff) | |
| download | linux-dev-8bc0ccf6b1f0c0c6eef8301cb2a5b743a01635db.tar.xz linux-dev-8bc0ccf6b1f0c0c6eef8301cb2a5b743a01635db.zip | |
drm/i915/skl: Implement WaDisableLSQCROPERFforOCL
Signed-off-by: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: Nick Hoath <nicholas.hoath@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
| -rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 5 |
3 files changed, 9 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 4cea57add113..b37604bbdf1a 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -2396,6 +2396,7 @@ struct drm_i915_cmd_table { #define SKL_REVID_B0 (0x1) #define SKL_REVID_C0 (0x2) #define SKL_REVID_D0 (0x3) +#define SKL_REVID_E0 (0x4) /* * The genX designation typically refers to the render engine, so render diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index b610764768d7..0fb6a4f6c6f7 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -5259,6 +5259,9 @@ enum skl_disp_power_wells { #define GEN7_L3SQCREG4 0xb034 #define L3SQ_URB_READ_CAM_MATCH_DISABLE (1<<27) +#define GEN8_L3SQCREG4 0xb118 +#define GEN8_LQSC_RO_PERF_DIS (1<<27) + /* GEN8 chicken */ #define HDC_CHICKEN0 0x7300 #define HDC_FENCE_DEST_SLM_DISABLE (1<<14) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index af8dca28c505..d7750176091b 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -65,6 +65,11 @@ static void skl_init_clock_gating(struct drm_device *dev) GEN8_GAPSUNIT_CLOCK_GATE_DISABLE | GEN8_SDEUNIT_CLOCK_GATE_DISABLE); } + + if (INTEL_REVID(dev) <= SKL_REVID_E0) + /* WaDisableLSQCROPERFforOCL:skl */ + I915_WRITE(GEN8_L3SQCREG4, I915_READ(GEN8_L3SQCREG4) | + GEN8_LQSC_RO_PERF_DIS); } static void i915_pineview_get_mem_freq(struct drm_device *dev) |