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authorFabio Estevam <festevam@gmail.com>2020-07-13 10:04:15 -0300
committerShawn Guo <shawnguo@kernel.org>2020-07-20 10:19:08 +0800
commit91ea910809953beb95246bc3c933bd4e1bffdf59 (patch)
tree7d50da0defcd0476f5a7c73a1491f2e9c2d3bffd
parentARM: dts: imx6qdl-gw: add Gateworks System Controller support (diff)
downloadlinux-dev-91ea910809953beb95246bc3c933bd4e1bffdf59.tar.xz
linux-dev-91ea910809953beb95246bc3c933bd4e1bffdf59.zip
ARM: dts: imx6qdl-sabresd: Add an mdio node
imx6qdl-sabresd has an Atheros AR8031 Ethernet PHY at address 1. The AR8031 provides a 125MHz clock to the ENET_REF_CLK i.MX6 pin. Improve the Ethernet representation by adding an mdio node with such information. An advantage of adding the mdio node is that the AR8031 initialization code in the mx6sabresd board file in U-Boot can totally be removed. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Soeren Moch <smoch@web.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabresd.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index 550e22511e34..eaa2146bb937 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -203,9 +203,20 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
+ phy-handle = <&phy>;
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
fsl,magic-packet;
status = "okay";
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: ethernet-phy@1 {
+ reg = <1>;
+ qca,clk-out-frequency = <125000000>;
+ };
+ };
};
&hdmi {