diff options
| author |   William Zhang <william.zhang@broadcom.com> | 2022-08-01 12:47:53 -0700 |
|---|---|---|
| committer |   Florian Fainelli <f.fainelli@gmail.com> | 2022-08-15 09:35:56 -0700 |
| commit | 925fbca46d4b128cf5530ead5422bb697232c1a5 (patch) | |
| tree | 9ec922d1967924b743fbe1ca1a4a6467a501dd61 | |
| parent | ARM: dts: bcmbca: bcm6846: fix interrupt controller node (diff) | |
| download | linux-dev-925fbca46d4b128cf5530ead5422bb697232c1a5.tar.xz linux-dev-925fbca46d4b128cf5530ead5422bb697232c1a5.zip | |
ARM: dts: bcmbca: bcm6878: fix timer node cpu mask flag
The cpu mask flag value should match the number of cpu cores in the
chip. Correct the value to two cpus for BCM6878 dual core SoC.
Fixes: 6bcad714e173 ("ARM: dts: Add DTS files for bcmbca SoC BCM6878")
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20220801194754.29492-1-william.zhang@broadcom.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| -rw-r--r-- | arch/arm/boot/dts/bcm6878.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/bcm6878.dtsi b/arch/arm/boot/dts/bcm6878.dtsi index a7dff596fe1e..6dd3d2df4e16 100644 --- a/arch/arm/boot/dts/bcm6878.dtsi +++ b/arch/arm/boot/dts/bcm6878.dtsi @@ -39,10 +39,10 @@ timer { compatible = "arm,armv7-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; + interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; arm,cpu-registers-not-fw-configured; }; |