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authorBen Skeggs <bskeggs@redhat.com>2021-11-23 18:17:56 +1000
committerKarol Herbst <kherbst@redhat.com>2021-12-16 18:46:10 +0100
commit9543e3c0511da64a77b1af3ab1f7199c39226e1b (patch)
treef10a215673a975ca38771dbafa5f080c34d2ae1c
parentdrm/nouveau/disp/dp: add support for tps4 (diff)
downloadlinux-dev-9543e3c0511da64a77b1af3ab1f7199c39226e1b.tar.xz
linux-dev-9543e3c0511da64a77b1af3ab1f7199c39226e1b.zip
drm/nouveau/disp/dp: fixup cr/eq delays for 1.4
Also use usleep_range() instead of [um]delay() to be a bit nicer. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Reviewed-by: Lyude Paul <lyude@redhat.com> Signed-off-by: Karol Herbst <kherbst@redhat.com> Link: https://gitlab.freedesktop.org/drm/nouveau/-/merge_requests/17
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c18
-rw-r--r--drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h3
2 files changed, 12 insertions, 9 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c
index 565ee63c0f1d..eee2451123c9 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c
@@ -54,10 +54,7 @@ nvkm_dp_train_sense(struct lt_state *lt, bool pc, u32 delay)
struct nvkm_dp *dp = lt->dp;
int ret;
- if (dp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL])
- mdelay(dp->dpcd[DPCD_RC0E_AUX_RD_INTERVAL] * 4);
- else
- udelay(delay);
+ usleep_range(delay, delay * 2);
ret = nvkm_rdaux(dp->aux, DPCD_LS02, lt->stat, 6);
if (ret)
@@ -166,7 +163,7 @@ static int
nvkm_dp_train_eq(struct lt_state *lt)
{
bool eq_done = false, cr_done = true;
- int tries = 0, i;
+ int tries = 0, usec = 0, i;
{
if (lt->dp->dpcd[DPCD_RC00_DPCD_REV] >= 0x14 &&
@@ -178,12 +175,14 @@ nvkm_dp_train_eq(struct lt_state *lt)
nvkm_dp_train_pattern(lt, 3);
else
nvkm_dp_train_pattern(lt, 2);
+
+ usec = (lt->dp->dpcd[DPCD_RC0E] & DPCD_RC0E_AUX_RD_INTERVAL) * 4000;
}
do {
if ((tries &&
nvkm_dp_train_drive(lt, lt->pc2)) ||
- nvkm_dp_train_sense(lt, lt->pc2, 400))
+ nvkm_dp_train_sense(lt, lt->pc2, usec ? usec : 400))
break;
eq_done = !!(lt->stat[2] & DPCD_LS04_INTERLANE_ALIGN_DONE);
@@ -205,13 +204,16 @@ nvkm_dp_train_cr(struct lt_state *lt)
{
bool cr_done = false, abort = false;
int voltage = lt->conf[0] & DPCD_LC03_VOLTAGE_SWING_SET;
- int tries = 0, i;
+ int tries = 0, usec = 0, i;
nvkm_dp_train_pattern(lt, 1);
+ if (lt->dp->dpcd[DPCD_RC00_DPCD_REV] < 0x14)
+ usec = (lt->dp->dpcd[DPCD_RC0E] & DPCD_RC0E_AUX_RD_INTERVAL) * 4000;
+
do {
if (nvkm_dp_train_drive(lt, false) ||
- nvkm_dp_train_sense(lt, false, 100))
+ nvkm_dp_train_sense(lt, false, usec ? usec : 100))
break;
cr_done = true;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h
index 1becf9da3ed7..104f847b5abf 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h
@@ -47,7 +47,8 @@ void nvkm_dp_disable(struct nvkm_outp *, struct nvkm_ior *);
#define DPCD_RC03 0x00003
#define DPCD_RC03_TPS4_SUPPORTED 0x80
#define DPCD_RC03_MAX_DOWNSPREAD 0x01
-#define DPCD_RC0E_AUX_RD_INTERVAL 0x0000e
+#define DPCD_RC0E 0x0000e
+#define DPCD_RC0E_AUX_RD_INTERVAL 0x7f
/* DPCD Link Configuration */
#define DPCD_LC00_LINK_BW_SET 0x00100