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authorSumit Gupta <sumitg@nvidia.com>2022-04-05 18:31:19 +0530
committerThierry Reding <treding@nvidia.com>2022-04-25 18:12:00 +0200
commit962c400d48e604438cfb3732016ad1b74bfc298c (patch)
treeee0b12f377c7854135d0c984a93d2d7d04969812
parentarm64: tegra: Add QSPI controllers on Tegra234 (diff)
downloadlinux-dev-962c400d48e604438cfb3732016ad1b74bfc298c.tar.xz
linux-dev-962c400d48e604438cfb3732016ad1b74bfc298c.zip
arm64: tegra: Add node for Tegra234 CCPLEX cluster
Adding CCPLEX cluster node to represent Tegra234 cpufreq. Tegra234 uses some of the CRAB (Control Register Access Bus) registers for CPU frequency requests. These registers are memory mapped to the CCPLEX_MMCRAB_ARM region. In this node, mapping the range of MMCRAB registers is required only for CPU frequency info. Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra234.dtsi7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
index 448512af7dea..8767dbe2d066 100644
--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi
@@ -1286,6 +1286,13 @@
};
};
+ ccplex@e000000 {
+ compatible = "nvidia,tegra234-ccplex-cluster";
+ reg = <0x0 0x0e000000 0x0 0x5ffff>;
+ nvidia,bpmp = <&bpmp>;
+ status = "okay";
+ };
+
sram@40000000 {
compatible = "nvidia,tegra234-sysram", "mmio-sram";
reg = <0x0 0x40000000 0x0 0x80000>;