diff options
| author | 2019-08-22 17:46:55 -0700 | |
|---|---|---|
| committer | 2019-08-28 13:03:39 -0700 | |
| commit | 9770f22077981cac2bd2f4dd6caa6269892cd3f7 (patch) | |
| tree | 8ff1d1b16cc51f70138d2afcc52833f9ab261c3b | |
| parent | drm/i915: Protect our local workers against I915_FENCE_TIMEOUT (diff) | |
drm/i915/tgl: Enabling DSC on Pipe A for TGL
DSC was not supported on Pipe A for previous platforms. Tigerlake onwards,
all the pipes support DSC. Hence, the DSC and FEC restriction on
Pipe A needs to be removed.
v2: Changes in the logic around removing the restriction around
Pipe A (Manasi, Lucas)
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Manasi Navare <manasi.d.navare@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190823004655.28905-1-madhumitha.tolakanahalli.pradeep@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_dp.c | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index f74594d8d9df..c9986c7a3f5b 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -1737,8 +1737,14 @@ static bool intel_dp_source_supports_fec(struct intel_dp *intel_dp, { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - return INTEL_GEN(dev_priv) >= 11 && - pipe_config->cpu_transcoder != TRANSCODER_A; + /* On TGL, FEC is supported on all Pipes */ + if (INTEL_GEN(dev_priv) >= 12) + return true; + + if (IS_GEN(dev_priv, 11) && pipe_config->cpu_transcoder != TRANSCODER_A) + return true; + + return false; } static bool intel_dp_supports_fec(struct intel_dp *intel_dp, @@ -1753,8 +1759,15 @@ static bool intel_dp_source_supports_dsc(struct intel_dp *intel_dp, { struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); - return INTEL_GEN(dev_priv) >= 10 && - pipe_config->cpu_transcoder != TRANSCODER_A; + /* On TGL, DSC is supported on all Pipes */ + if (INTEL_GEN(dev_priv) >= 12) + return true; + + if (INTEL_GEN(dev_priv) >= 10 && + pipe_config->cpu_transcoder != TRANSCODER_A) + return true; + + return false; } static bool intel_dp_supports_dsc(struct intel_dp *intel_dp, |
