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| author |   Michal Simek <michal.simek@xilinx.com> | 2020-11-12 13:52:34 +0100 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2020-11-25 13:29:54 +0100 |
| commit | 9854bc7dfa5f7661538b08dc44d5e6c8876832fb (patch) | |
| tree | 0b9cb04f35d8bdb52da1889536f7d42c0dc84d2c | |
| parent | arm64: dts: zynqmp: Fix pcie ranges description (diff) | |
| download | linux-dev-9854bc7dfa5f7661538b08dc44d5e6c8876832fb.tar.xz linux-dev-9854bc7dfa5f7661538b08dc44d5e6c8876832fb.zip | |
arm64: dts: zynqmp: Wire mailbox with zynqmp-power driver
The support to driver was added by commit ffdbae28d9d1 ("drivers: soc:
xilinx: Use mailbox IPI callback") that's why also enable it via DT by
default. It setups communication with firmware via IPI interface.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/5d3523150890e494df308ee69523d0f0e7b33b22.1605185549.git.michal.simek@xilinx.com
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 66dad22b8a76..68923fbd0e89 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -99,6 +99,29 @@ }; }; + zynqmp_ipi { + compatible = "xlnx,zynqmp-ipi-mailbox"; + interrupt-parent = <&gic>; + interrupts = <0 35 4>; + xlnx,ipi-id = <0>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + ipi_mailbox_pmu1: mailbox@ff990400 { + reg = <0x0 0xff9905c0 0x0 0x20>, + <0x0 0xff9905e0 0x0 0x20>, + <0x0 0xff990e80 0x0 0x20>, + <0x0 0xff990ea0 0x0 0x20>; + reg-names = "local_request_region", + "local_response_region", + "remote_request_region", + "remote_response_region"; + #mbox-cells = <1>; + xlnx,ipi-id = <4>; + }; + }; + dcc: dcc { compatible = "arm,dcc"; status = "disabled"; @@ -128,6 +151,8 @@ compatible = "xlnx,zynqmp-power"; interrupt-parent = <&gic>; interrupts = <0 35 4>; + mboxes = <&ipi_mailbox_pmu1 0>, <&ipi_mailbox_pmu1 1>; + mbox-names = "tx", "rx"; }; zynqmp_clk: clock-controller { |