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authorClemens Ladisch <clemens@ladisch.de>2010-06-10 08:26:48 +0200
committerClemens Ladisch <clemens@ladisch.de>2010-06-10 08:26:48 +0200
commit9ab5071cd4a16001e4ba790172a7da5e4172462b (patch)
treebb1ba598d4f2df93b661411c833b60bb953e3390
parentfirewire: core: add CSR SPLIT_TIMEOUT support (diff)
downloadlinux-dev-9ab5071cd4a16001e4ba790172a7da5e4172462b.tar.xz
linux-dev-9ab5071cd4a16001e4ba790172a7da5e4172462b.zip
firewire: add CSR CYCLE_TIME write support
The specification requires that CYCLE_TIME is writable so that it can be initialized, so we better implement it. Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
-rw-r--r--drivers/firewire/core-transaction.c3
-rw-r--r--drivers/firewire/ohci.c7
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/firewire/core-transaction.c b/drivers/firewire/core-transaction.c
index 9a7d3ec23f2b..e3925f67ec12 100644
--- a/drivers/firewire/core-transaction.c
+++ b/drivers/firewire/core-transaction.c
@@ -1097,6 +1097,9 @@ static void handle_registers(struct fw_card *card, struct fw_request *request,
if (TCODE_IS_READ_REQUEST(tcode) && length == 4)
*data = cpu_to_be32(card->driver->
read_csr_reg(card, CSR_CYCLE_TIME));
+ else if (tcode == TCODE_WRITE_QUADLET_REQUEST)
+ card->driver->write_csr_reg(card, CSR_CYCLE_TIME,
+ be32_to_cpu(*data));
else
rcode = RCODE_TYPE_ERROR;
break;
diff --git a/drivers/firewire/ohci.c b/drivers/firewire/ohci.c
index a55fbbce9e79..777811a736b2 100644
--- a/drivers/firewire/ohci.c
+++ b/drivers/firewire/ohci.c
@@ -1996,6 +1996,13 @@ static void ohci_write_csr_reg(struct fw_card *card, int csr_offset, u32 value)
flush_writes(ohci);
break;
+ case CSR_CYCLE_TIME:
+ reg_write(ohci, OHCI1394_IsochronousCycleTimer, value);
+ reg_write(ohci, OHCI1394_IntEventSet,
+ OHCI1394_cycleInconsistent);
+ flush_writes(ohci);
+ break;
+
default:
WARN_ON(1);
break;