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authorRichard Zhu <hongxing.zhu@nxp.com>2021-04-14 10:26:14 +0800
committerShawn Guo <shawnguo@kernel.org>2021-06-12 16:17:02 +0800
commit9b95c44b417662327e1a2602cc6c6af8cba95825 (patch)
tree143ca4ffb36705273d518a15dda577494c21e8ec
parentarm64: dts: imx8mm: Add spba1 and spba2 buses (diff)
downloadlinux-dev-9b95c44b417662327e1a2602cc6c6af8cba95825.tar.xz
linux-dev-9b95c44b417662327e1a2602cc6c6af8cba95825.zip
arm64: dts: imx8mq-evk: add one regulator used to power up pcie phy
Both 1.8v and 3.3v power supplies can be used by i.MX8MQ PCIe PHY. In default, the PCIE_VPH voltage is suggested to be 1.8v refer to data sheet. When PCIE_VPH is supplied by 3.3v in the HW schematic design, the VREG_BYPASS bits of GPR registers should be cleared from default value 1b'1 to 1b'0. Thus, the internal 3v3 to 1v8 translator would be turned on. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mq-evk.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
index 85b045253a0e..4d2035e3dd7c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
@@ -318,6 +318,7 @@
<&clk IMX8MQ_CLK_PCIE1_PHY>,
<&pcie0_refclk>;
clock-names = "pcie", "pcie_aux", "pcie_phy", "pcie_bus";
+ vph-supply = <&vgen5_reg>;
status = "okay";
};