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authorMaxime Ripard <maxime@cerno.tech>2020-01-03 16:28:00 +0100
committerMaxime Ripard <maxime@cerno.tech>2020-01-04 09:45:19 +0100
commit9c232d324bfa1bb6204f6c2c5e1bea12c51cc6bd (patch)
tree7adaf7e22c1c9d7283d4e8a57c27917e1d4a69d6
parentclk: sunxi: a31: Export the MIPI PLL (diff)
downloadlinux-dev-9c232d324bfa1bb6204f6c2c5e1bea12c51cc6bd.tar.xz
linux-dev-9c232d324bfa1bb6204f6c2c5e1bea12c51cc6bd.zip
clk: sunxi: a23/a33: Export the MIPI PLL
The MIPI PLL is used for LVDS. Make sure it's exported in the dt bindings headers. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech>
-rw-r--r--drivers/clk/sunxi-ng/ccu-sun8i-a23-a33.h4
-rw-r--r--include/dt-bindings/clock/sun8i-a23-a33-ccu.h2
2 files changed, 5 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-a23-a33.h b/drivers/clk/sunxi-ng/ccu-sun8i-a23-a33.h
index 72df69291cc6..5bf5c4d13b4c 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-a23-a33.h
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-a23-a33.h
@@ -24,7 +24,9 @@
#define CLK_PLL_PERIPH 10
#define CLK_PLL_PERIPH_2X 11
#define CLK_PLL_GPU 12
-#define CLK_PLL_MIPI 13
+
+/* The PLL MIPI clock is exported */
+
#define CLK_PLL_HSIC 14
#define CLK_PLL_DE 15
#define CLK_PLL_DDR1 16
diff --git a/include/dt-bindings/clock/sun8i-a23-a33-ccu.h b/include/dt-bindings/clock/sun8i-a23-a33-ccu.h
index f8222b6b2cc3..eb524d0bbd01 100644
--- a/include/dt-bindings/clock/sun8i-a23-a33-ccu.h
+++ b/include/dt-bindings/clock/sun8i-a23-a33-ccu.h
@@ -43,6 +43,8 @@
#ifndef _DT_BINDINGS_CLK_SUN8I_A23_A33_H_
#define _DT_BINDINGS_CLK_SUN8I_A23_A33_H_
+#define CLK_PLL_MIPI 13
+
#define CLK_CPUX 18
#define CLK_BUS_MIPI_DSI 23