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authorZev Weiss <zev@bewilderbeest.net>2021-04-11 22:47:09 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2021-04-15 10:18:35 +0200
commita13df3bec5963dc8f0f49257ae4f83c1445acaff (patch)
tree5c22956c8639e8cdb6ec6df58e2e2b68708b0d48
parenttty: hvc: make symbol 'hvc_udbg_dev' static (diff)
downloadlinux-dev-a13df3bec5963dc8f0f49257ae4f83c1445acaff.tar.xz
linux-dev-a13df3bec5963dc8f0f49257ae4f83c1445acaff.zip
dt-bindings: serial: 8250: deprecate aspeed, sirq-polarity-sense
This property ties SIRQ polarity to SCU register bits that don't necessarily have any direct relationship to it; the only use of it was removed in commit c82bf6e133d3 ("ARM: aspeed: g5: Do not set sirq polarity"). Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Zev Weiss <zev@bewilderbeest.net> Link: https://lore.kernel.org/r/20210412034712.16778-2-zev@bewilderbeest.net Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--Documentation/devicetree/bindings/serial/8250.yaml1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml
index c0e292cdaa6b..204b1724bdf6 100644
--- a/Documentation/devicetree/bindings/serial/8250.yaml
+++ b/Documentation/devicetree/bindings/serial/8250.yaml
@@ -189,6 +189,7 @@ properties:
offset and bit number to identify how the SIRQ polarity should be
configured. One possible data source is the LPC/eSPI mode bit. Only
applicable to aspeed,ast2500-vuart.
+ deprecated: true
required:
- reg