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| author |   Andre Przywara <andre.przywara@arm.com> | 2022-03-17 16:23:43 +0000 |
|---|---|---|
| committer |   Jernej Skrabec <jernej.skrabec@gmail.com> | 2022-04-06 22:26:33 +0200 |
| commit | a6d9efb62a482c2da1078d9654b68a0777aa2fc6 (patch) | |
| tree | 5e6eb45cbf9434cf22cda92175f51cf0751f2afb | |
| parent | ARM: dts: suniv: F1C100: add clock and reset macros (diff) | |
| download | linux-dev-a6d9efb62a482c2da1078d9654b68a0777aa2fc6.tar.xz linux-dev-a6d9efb62a482c2da1078d9654b68a0777aa2fc6.zip | |
ARM: dts: suniv: F1C100: fix CPU node
The /cpu node in the f1c100s.dtsi is not spec compliant, it's missing
the reg property, and the corresponding address and size cells
properties.
Add them to make the bindings check pass.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220317162349.739636-7-andre.przywara@arm.com
| -rw-r--r-- | arch/arm/boot/dts/suniv-f1c100s.dtsi | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi index 922efd5e9457..0a7fa37bbd24 100644 --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi @@ -29,9 +29,13 @@ }; cpus { - cpu { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { compatible = "arm,arm926ej-s"; device_type = "cpu"; + reg = <0x0>; }; }; |