diff options
| author |   Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-02-24 16:42:14 +0200 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-03-08 18:39:54 +0200 |
| commit | aaca50ef45ed247d98a66c0a754d1be93ff35dde (patch) | |
| tree | 9bb8040641995204d0750249674fd47e7d3183d5 | |
| parent | drm/i915: Add encoder->is_clock_enabled() (diff) | |
| download | linux-dev-aaca50ef45ed247d98a66c0a754d1be93ff35dde.tar.xz linux-dev-aaca50ef45ed247d98a66c0a754d1be93ff35dde.zip | |
drm/i915: Extend icl_sanitize_encoder_pll_mapping() to all DDI platforms
Now that all the encoder clock stuff is uniformly abstracted
for all hsw+ platforms, let's extend icl_sanitize_encoder_pll_mapping()
to cover all of them.
Not sure there is a particular benefit in doing so, but less special
cases always makes me happy.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210224144214.24803-7-ville.syrjala@linux.intel.com
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_ddi.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_ddi.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_display.c | 4 |
3 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 59f105c84242..ba83682e1d3e 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -2133,7 +2133,7 @@ static void intel_ddi_disable_clock(struct intel_encoder *encoder) encoder->disable_clock(encoder); } -void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder) +void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder) { struct drm_i915_private *i915 = to_i915(encoder->base.dev); u32 port_mask; diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h index 99cebbe6b586..59c6b01d4199 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.h +++ b/drivers/gpu/drm/i915/display/intel_ddi.h @@ -66,6 +66,6 @@ u32 ddi_signal_levels(struct intel_dp *intel_dp, int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder, enum transcoder cpu_transcoder, bool enable, u32 hdcp_mask); -void icl_sanitize_encoder_pll_mapping(struct intel_encoder *encoder); +void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder); #endif /* __INTEL_DDI_H__ */ diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 18d7f7afc8ee..f4bf81f27f31 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -13146,8 +13146,8 @@ static void intel_sanitize_encoder(struct intel_encoder *encoder) /* notify opregion of the sanitized encoder state */ intel_opregion_notify_encoder(encoder, connector && has_active_crtc); - if (INTEL_GEN(dev_priv) >= 11) - icl_sanitize_encoder_pll_mapping(encoder); + if (HAS_DDI(dev_priv)) + intel_ddi_sanitize_encoder_pll_mapping(encoder); } /* FIXME read out full plane state for all planes */ |