diff options
| author |   Vinod Koul <vkoul@kernel.org> | 2021-12-01 12:53:10 +0530 |
|---|---|---|
| committer |   Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-12-06 10:14:19 -0600 |
| commit | ab5d31790f4d50d601f150223d6da3dfaab50349 (patch) | |
| tree | 646521f30b2c3f696861e62e5f0b40558e03d241 | |
| parent | dt-bindings: clock: Add RPMHCC bindings for SM8450 (diff) | |
| download | linux-dev-ab5d31790f4d50d601f150223d6da3dfaab50349.tar.xz linux-dev-ab5d31790f4d50d601f150223d6da3dfaab50349.zip | |
clk: qcom: rpmh: add support for SM8450 rpmh clocks
This adds the RPMH clocks present in SM8450 SoC
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211201072310.3968679-5-vkoul@kernel.org
| -rw-r--r-- | drivers/clk/qcom/clk-rpmh.c | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c index 30b26fb96514..74e57c84f60a 100644 --- a/drivers/clk/qcom/clk-rpmh.c +++ b/drivers/clk/qcom/clk-rpmh.c @@ -515,6 +515,32 @@ static const struct clk_rpmh_desc clk_rpmh_sm8350 = { /* Resource name must match resource id present in cmd-db */ DEFINE_CLK_RPMH_ARC(sc7280, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 4); +DEFINE_CLK_RPMH_VRM(sm8450, ln_bb_clk1, ln_bb_clk1_ao, "lnbclka1", 4); +DEFINE_CLK_RPMH_VRM(sm8450, ln_bb_clk2, ln_bb_clk2_ao, "lnbclka2", 4); + +static struct clk_hw *sm8450_rpmh_clocks[] = { + [RPMH_CXO_CLK] = &sc7280_bi_tcxo.hw, + [RPMH_CXO_CLK_A] = &sc7280_bi_tcxo_ao.hw, + [RPMH_LN_BB_CLK1] = &sm8450_ln_bb_clk1.hw, + [RPMH_LN_BB_CLK1_A] = &sm8450_ln_bb_clk1_ao.hw, + [RPMH_LN_BB_CLK2] = &sm8450_ln_bb_clk2.hw, + [RPMH_LN_BB_CLK2_A] = &sm8450_ln_bb_clk2_ao.hw, + [RPMH_RF_CLK1] = &sdm845_rf_clk1.hw, + [RPMH_RF_CLK1_A] = &sdm845_rf_clk1_ao.hw, + [RPMH_RF_CLK2] = &sdm845_rf_clk2.hw, + [RPMH_RF_CLK2_A] = &sdm845_rf_clk2_ao.hw, + [RPMH_RF_CLK3] = &sdm845_rf_clk3.hw, + [RPMH_RF_CLK3_A] = &sdm845_rf_clk3_ao.hw, + [RPMH_RF_CLK4] = &sm8350_rf_clk4.hw, + [RPMH_RF_CLK4_A] = &sm8350_rf_clk4_ao.hw, + [RPMH_IPA_CLK] = &sdm845_ipa.hw, +}; + +static const struct clk_rpmh_desc clk_rpmh_sm8450 = { + .clks = sm8450_rpmh_clocks, + .num_clks = ARRAY_SIZE(sm8450_rpmh_clocks), +}; + static struct clk_hw *sc7280_rpmh_clocks[] = { [RPMH_CXO_CLK] = &sc7280_bi_tcxo.hw, [RPMH_CXO_CLK_A] = &sc7280_bi_tcxo_ao.hw, @@ -672,6 +698,7 @@ static const struct of_device_id clk_rpmh_match_table[] = { { .compatible = "qcom,sm8150-rpmh-clk", .data = &clk_rpmh_sm8150}, { .compatible = "qcom,sm8250-rpmh-clk", .data = &clk_rpmh_sm8250}, { .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350}, + { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450}, { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280}, { } }; |