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| author |   Dinh Nguyen <dinguyen@kernel.org> | 2022-07-25 15:03:07 -0500 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2022-07-25 15:03:07 -0500 |
| commit | b3cbbb58632fa6f9cebf3f5c3ba210f11a3bdeb8 (patch) | |
| tree | 4447f2acee2a616d1f5e69c0e6bf282e53179d1a | |
| parent | arm64: dts: altera: socfpga_stratix10: move clocks out of soc node (diff) | |
| download | linux-dev-b3cbbb58632fa6f9cebf3f5c3ba210f11a3bdeb8.tar.xz linux-dev-b3cbbb58632fa6f9cebf3f5c3ba210f11a3bdeb8.zip | |
ARM: dts: add EMAC AXI settings for Cyclone5
Add the dts entries needed to support the EMAC AXI bus settings on the
Cyclone5.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/socfpga.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi index bfaef45bdd04..2459f3cd7dd9 100644 --- a/arch/arm/boot/dts/socfpga.dtsi +++ b/arch/arm/boot/dts/socfpga.dtsi @@ -561,6 +561,12 @@ interrupts = <0 175 4>; }; + socfpga_axi_setup: stmmac-axi-config { + snps,wr_osr_lmt = <0xf>; + snps,rd_osr_lmt = <0xf>; + snps,blen = <0 0 0 0 16 0 0>; + }; + gmac0: ethernet@ff700000 { compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac"; altr,sysmgr-syscon = <&sysmgr 0x60 0>; @@ -576,6 +582,7 @@ snps,perfect-filter-entries = <128>; tx-fifo-depth = <4096>; rx-fifo-depth = <4096>; + snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; @@ -594,6 +601,7 @@ snps,perfect-filter-entries = <128>; tx-fifo-depth = <4096>; rx-fifo-depth = <4096>; + snps,axi-config = <&socfpga_axi_setup>; status = "disabled"; }; |