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| author |   Stanley.Yang <Stanley.Yang@amd.com> | 2021-08-04 15:43:17 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-04-28 17:48:35 -0400 |
| commit | ba9e7a4a31ab679e60bcb7ed17b9a01a89f15df4 (patch) | |
| tree | 34b8e037f50fb2ebe97d334145f2a6c68b9ae036 | |
| parent | drm/amdgpu: add nbio callback to query rom offset (diff) | |
| download | linux-dev-ba9e7a4a31ab679e60bcb7ed17b9a01a89f15df4.tar.xz linux-dev-ba9e7a4a31ab679e60bcb7ed17b9a01a89f15df4.zip | |
drm/amdgpu: add new write field for soc21
add new write field macro to handle soc21
registers with reg prefix
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/soc15_common.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h b/drivers/gpu/drm/amd/amdgpu/soc15_common.h index acce8c2e0328..9fefd403e14f 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h +++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h @@ -45,6 +45,14 @@ ~REG_FIELD_MASK(reg, field)) | (val) << REG_FIELD_SHIFT(reg, field), \ 0, ip##_HWIP) +#define WREG32_FIELD15_PREREG(ip, idx, reg_name, field, val) \ + __WREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][idx][reg##reg_name##_BASE_IDX] + reg##reg_name, \ + (__RREG32_SOC15_RLC__( \ + adev->reg_offset[ip##_HWIP][idx][reg##reg_name##_BASE_IDX] + reg##reg_name, \ + 0, ip##_HWIP) & \ + ~REG_FIELD_MASK(reg_name, field)) | (val) << REG_FIELD_SHIFT(reg_name, field), \ + 0, ip##_HWIP) + #define RREG32_SOC15(ip, inst, reg) \ __RREG32_SOC15_RLC__(adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg, \ 0, ip##_HWIP) |