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| author |   Oleksij Rempel <o.rempel@pengutronix.de> | 2021-09-02 09:19:51 +0200 |
|---|---|---|
| committer |   Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2021-09-02 10:18:26 +0200 |
| commit | bea6a94a279bcbe6b2cde348782b28baf12255a5 (patch) | |
| tree | 4f79541a5db2f12af8ca5831fa0e81d5460a3973 | |
| parent | MIPS: ingenic: Unconditionally enable clock of CPU #0 (diff) | |
| download | linux-dev-bea6a94a279bcbe6b2cde348782b28baf12255a5.tar.xz linux-dev-bea6a94a279bcbe6b2cde348782b28baf12255a5.zip | |
MIPS: Malta: fix alignment of the devicetree buffer
Starting with following patch MIPS Malta is not able to boot:
| commit 79edff12060fe7772af08607eff50c0e2486c5ba
| Author: Rob Herring <robh@kernel.org>
| scripts/dtc: Update to upstream version v1.6.0-51-g183df9e9c2b9
The reason is the alignment test added to the fdt_ro_probe_(). To fix
this issue, we need to make sure that fdt_buf is aligned.
Since the dtc patch was designed to uncover potential issue, I handle
initial MIPS Malta patch as initial bug.
Fixes: e81a8c7dabac ("MIPS: Malta: Setup RAM regions via DT")
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
| -rw-r--r-- | arch/mips/mti-malta/malta-dtshim.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mti-malta/malta-dtshim.c b/arch/mips/mti-malta/malta-dtshim.c index 0ddf03df6268..f451268f6c38 100644 --- a/arch/mips/mti-malta/malta-dtshim.c +++ b/arch/mips/mti-malta/malta-dtshim.c @@ -22,7 +22,7 @@ #define ROCIT_CONFIG_GEN1_MEMMAP_SHIFT 8 #define ROCIT_CONFIG_GEN1_MEMMAP_MASK (0xf << 8) -static unsigned char fdt_buf[16 << 10] __initdata; +static unsigned char fdt_buf[16 << 10] __initdata __aligned(8); /* determined physical memory size, not overridden by command line args */ extern unsigned long physical_memsize; |