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| author |   Lucas Stach <l.stach@pengutronix.de> | 2019-01-25 17:20:33 +0100 |
|---|---|---|
| committer |   Shawn Guo <shawnguo@kernel.org> | 2019-02-01 15:02:50 +0800 |
| commit | c412123f2fa31bb032efa5f6f66b951de8714ab8 (patch) | |
| tree | 746c117ae431d82598a23fcd8f319163bcb765ea | |
| parent | arm64: dts: lx2160a: update fspi node (diff) | |
| download | linux-dev-c412123f2fa31bb032efa5f6f66b951de8714ab8.tar.xz linux-dev-c412123f2fa31bb032efa5f6f66b951de8714ab8.zip | |
arm64: dts: imx8mq: properly describe IRQ hierarchy
The GPCv2 sits between most of the peripherals and the GIC and
functions as a wakeup controller for the CPU cores.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mq.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 892063a7c26c..603b2ec80ed6 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -11,8 +11,7 @@ #include "imx8mq-pinfunc.h" / { - /* This should really be the GPC, but we need a driver for this first */ - interrupt-parent = <&gic>; + interrupt-parent = <&gpc>; #address-cells = <2>; #size-cells = <2>; @@ -257,6 +256,9 @@ gpc: gpc@303a0000 { compatible = "fsl,imx8mq-gpc"; reg = <0x303a0000 0x10000>; + interrupt-parent = <&gic>; + interrupt-controller; + #interrupt-cells = <3>; pgc { #address-cells = <1>; |