diff options
| author |   Christian Lamparter <chunkeey@gmail.com> | 2020-08-22 18:19:21 +0200 |
|---|---|---|
| committer |   Florian Fainelli <f.fainelli@gmail.com> | 2020-08-26 17:03:13 -0700 |
| commit | c4cd6fcae46fd14aed8665b7cf66d0954765a873 (patch) | |
| tree | 668d97bc7c65704720687ce6dca6a0c3d292f6ba | |
| parent | ARM: dts: BCM5301X: Specify uart2 in the DT (diff) | |
ARM: dts: BCM5301X: Specify pcie2 in the DT
The SoC supports three pcie ports. Currently, only
pcie0 and pcie1 are enabled. This patch adds the
pcie2 port as well.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Reviewed-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
| -rw-r--r-- | arch/arm/boot/dts/bcm5301x.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm5301x.dtsi b/arch/arm/boot/dts/bcm5301x.dtsi index eb1290fed235..9d9e8fe3f6ae 100644 --- a/arch/arm/boot/dts/bcm5301x.dtsi +++ b/arch/arm/boot/dts/bcm5301x.dtsi @@ -252,6 +252,10 @@ reg = <0x00013000 0x1000>; }; + pcie2: pcie@14000 { + reg = <0x00014000 0x1000>; + }; + usb2: usb2@21000 { reg = <0x00021000 0x1000>; |